1. Introduction
2. Disassembly
3. Behavior Generation
4. Simple Combinational Example
5. Glitcher Example
6. Behavioral Optimization
7. Addaccu Example
8. Shifter Example
9. Retrieving ROM Content

Chapter 4 Subsections

4. Simple Combinational Example
4. 1. Comb Directory
4. 2. Comb Design
4. 3. Input Files
4. 4. Basic Execution and Output Files
4. 5. Primary Options and Configuration
4. 5. 1. CNS File Generation
4. 5. 2. Disabling VHDL and Verilog Generation
4. 5. 3. Timing Back-annotation