1. Software Installation
2. Overview
3. Theory Understanding
4. Scope of Usage
5. Design Flow Integration
6. Using Tcl Interface
7. Timing DB Construction
8. Timing DB Browsing
9. Static Timing Analysis
10. Crosstalk Analysis
11. Spice Deck Generation
12. Analog Sub-circuit Characterization
13. Timing Characterization (.lib)
14. Using the GUI
15. Managing Big Designs
16. Glossary

Chapter 9 Subsections

9. Static Timing Analysis
9. 1. Performing the Analysis
9. 2. Output Files
9. 3. Tcl Reports
9. 4. Timing Checks
9. 4. 1. Input to Latch
Inputs Specifications
Timing Checks Description
Setup Slack
Hold Slack
9. 4. 2. Latch to Latch
Timing Checks Description
Setup Slack
Hold Slack
9. 4. 3. Latch to Output
Output Constraints
Setup Slack
Hold Slack
9. 5. Skew Compensation
9. 6. Multicycle Paths
9. 7. Tips
9. 7. 1. Disabling Master-to-Slave Timing Checks
9. 8. On-Chip Variation
9. 9. Clock Schemes Handling
9. 9. 1. Clock Dividers
9. 9. 2. Pulse Generators
9. 9. 3. RS-based Clock Generators