1. Overview

This tutorial describes the use of HITAS Static Timing Analysis and Signal Integrity Analysis platform. The main purpose of this tutorial is to show the ability of the HiTAS platform to analyze designs at transistor level.

This tutorial explains how to set-up a complete Timing and SI verification flow for each component of the design, and then for the top-level. The verification flow includes the following steps:

The verification process is detailed in the following diagram: